10
В.Ф. Жирков, А.П. Калинин
Binary-coded decimal code (BCD) converter
of proper fractions in the binary code of sequential type
© V.F. Zhirkov, A.P. Kalinin
Bauman Moscow State Technical University, Moscow, 105005, Russia
The purpose of the research was to examine the algorithm of converting BCD of proper
fractions in the binary code and to implement the converter of multi-bit fraction of
sequential type. The converter of sequential type, unlike Raman converter is characterized
by homogeneous circuit constructing and, consequently, by simplicity of increasing the
bit of convertible digits. We showed that sequential type converter implementation on
programmable logic integrated circuits, for example, the company Xilinx, allows to convert
16-bit fraction for ~ 200 ns, 32-bit — 400 ns at 100 MHz clock.
Keywords
: number system, BCD, binary code, converter, proper fraction, EPLD, sequential
circuit.
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Zhirkov V.F.
(b. 1937) graduated from Bauman Moscow Higher Technical School in
1960. Assoc. Professor of the Computer Systems and Nets Department at Bauman Moscow
State Technical University. Author of more than 60 scientific papers. His major scientific
interest is signal processing in information-measuring systems. e-mail:
Kalinin A.P.
(b. 1993) is a student of the Computer Systems and Nets Department at
Bauman Moscow State Technical University. e-mail:
